We are looking for an experienced Principal Engineer – Design Verification to join our growing team in Noida.
This is an excellent opportunity to work on cutting‑edge semiconductor technologies and contribute to complex SoC/IP verification initiatives.Key Requirements: ✅ Strong expertise in Functional Verification, Power‑Aware Verification, Formal Verification, and Performance Verification ✅ Deep hands‑on experience with UVM and SystemVerilog ✅ Strong knowledge of Jasper or VC Formal for formal verification ✅ Good understanding of UPF/CPF and PtPx methodologies This role is ideal for seasoned verification professionals who are passionate about solving complex technical challenges and mentoring engineering teams while remaining deeply involved in execution.
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